Memristive technologies have been proposed to augment existing state-of-the-art CMOS circuits. Memristive device based memories can be integrated with existing digital circuits to increase functionality and system throughput. Memristive devices are two terminal devices that exhibit the properties of nonvolatility and high density. Unlike charge-based memories, information in an memristive devices are stored by modulating the material state or device state. A memristive device cell dissipates no static power to store a state and provides immunity to radiation and noise induced soft errors. Many candidate memristive devices exist such as RRAM, STT-MRAM, PCM, CBRAM, etc. Fabrication of these devices generally requires deposition of a thin film materials and is often compatible with existing CMOS manufacturing processes. The integration of these devices with CMOS is constrained primarily by lithographic patterning limits. Thus memristive devices scale with existing CMOS technologies.
The traditional approach of increasing CPU clock frequency has abated due to constraints on power consumption and density. To increase performance with each CMOS generation, thread-level parallelism has been exploited with multi-core processors. This approach utilizes an increasing number of CMOS transistors to support additional cores on the same die, rather than increase the frequency of a single processor. This increase in the number of cores, however, has increased the static power. Multithreading is an approach to enhance the performance of an individual core by increasing logic utilization. Handling each thread, however, requires duplication of resources (e.g., register files, flags, pipeline registers). This added overhead increases the area, power, and complexity of the processor and potentially increases the on-chip signal delay. The thread count is therefore typically limited to two to four threads per core in modern general purpose processors.